1. Field of the Invention
The present invention relates to a voltage converting circuit and a multiphase clock generating circuit used for the same, and more specifically to charge-pump type voltage converting circuit for generating a large positive and negative voltages from a single voltage source, and a multiphase clock generating circuit for driving the charge-pump type voltage converting circuit.
2. Description of Related Art
In the prior art, various voltage converting circuits and multiphase clock generating circuits used for the voltage converting circuits have been known. The voltage converting circuits can be classified into a step-up circuit and a step-down circuit.
(1) Step-up Voltage Converting Circuit
Conventionally, in order to obtain from single voltage source a positive or negative output voltage having the magnitude larger than a voltage source voltage, the step-up voltage converting circuit has been widely used in a voltage supply circuit for RS-232C driver/receiver IC (integrated circuit) and others. Some typical examples of the conventional step-up voltage converting circuit are disclosed in U.S. Pat. Nos. 4,777,577, 4,897,774, 4,999,761, 4,807,104 and 4,812,961. The step-up voltage converting circuits shown in these US patents are configured to be operated with a 2-phase clock, and are constructed of a so-called switched capacitor circuit type.
For example, the conventional step-up voltage converting circuit disclosed in FIG. 1A of U.S. Pat. No. 4,777,577 includes a step-up circuit part for generating a voltage which is of double of a voltage source voltage so that a doubled voltage is outputted from a positive voltage output terminal 40, and an inverting circuit part for generating an inverted voltage having the same magnitude as the doubled voltage so that the inverted doubled voltage is outputted from a negative voltage output terminal 38.
However, when the positive voltage output terminal 40 is connected to a large load which causes a voltage of positive voltage output terminal to drop, a voltage of a positive reservoir capacitor 22 and a voltage of an inverting capacitor 24 correspondingly drop. Namely, the absolute value of the voltage of the negative voltage output terminal 38 becomes small, with the result that another circuit connected to the negative voltage output terminal 38 becomes unable to maintain a stable operation. In addition, since variation in the voltage of the positive voltage output terminal 40 causes variation in the voltage of the negative voltage output terminal 38, if a voltage supply circuit is constituted of this step-up circuit, the variation of the output voltage becomes double, with the result that an overall system including the voltage supply circuit therein has a remarkably lowered reliability.
Furthermore, the conventional step-up circuit can generate a pair of positive and negative voltages such as .+-.2 V.sub.DD or .+-.3 V.sub.DD, which have the same absolute value and which have the magnitude that is an integer multiple of the voltage source voltage. However, it is sometimes required to supply positive and negative biasing voltages having different absolute values, for example, +3 V.sub.DD and -2 V.sub.DD, as in a bias voltage generating circuit for a CCD (charge coupled device) driver IC. For this application, the conventional step-up circuit cannot be used.
(2) Step-down Voltage Converting Circuit
Conventionally, the step-down voltage converting, circuit has been used for obtaining from a single voltage source a positive or negative output voltage having a magnitude smaller than a voltage source voltage. If this step-down circuit is incorporated on a printed circuit board, it is ordinary to use a three-terminal voltage regulator or a switching regulator using a solenoid. The three-terminal voltage regulator has to be implemented in a bipolar process, and has a large loss in its output stage transistor. On the other hand, the switching regulator has a loss smaller than that of the three-terminal regulator, but inevitably has a large scale since the solenoid must be incorporated therein.
Under this circumstance, in the case of incorporating a step-down circuit in a CMOS (complementary metal-oxide-semiconductor) integrated circuit, a switched capacitor type step-down circuit has been used which is highly compatible with a CMOS integrated circuit manufacturing process and which has less loss. One typical example of the conventional switched capacitor type step-down circuit is shown in Journal of Japan Society of Electronics and Communication Engineers, 83/8, Vol. J66-C, No.8, pp576-583.
This step-down circuit includes a reservoir capacitor connected between a positive voltage output terminal and a ground terminal, and a transfer capacitor having the same capacitance as that of the reservoir capacitor. During a first phase, these capacitors are connected in series between a positive electrode and a negative electrode of a voltage source, so that each of the capacitors is charged to a half of the voltage of the voltage source, and therefore, the voltage which is half of the voltage source voltage is outputted from the positive voltage output terminal. During a second phase complementary to the first phase, the capacitors are separated from the voltage source but connected in parallel to each other, so that the voltage of the positive voltage output terminal is maintained at half of the voltage source voltage.
However, this conventional step-down circuit cannot give positive and negative voltages having their absolute value which is a half of the voltage source voltage.
For example, it may be considered to add an inverting circuit which inverts the voltage on the positive voltage output terminal so as to supply a negative voltage having the same magnitude as the voltage of the positive voltage output terminal. This modification can surely give positive and negative output voltages, however, when the voltage of the positive voltage output terminal varies due to influence of an external load, the output voltage of the inverting circuit connected to the positive voltage output terminal correspondingly varies, with the result that an external circuit connected to the inverting circuit may malfunction. In addition, if a voltage supply circuit is composed of the step-down circuit having the added inverting circuit, the voltage variation on the positive voltage output terminal directly becomes the voltage variation on a negative voltage output terminal, and therefore, the voltage variation of the voltage supply circuit is doubled. Accordingly, reliability of the voltage supply circuit remarkably lowers.
(3) Multiphase Clock Generating Circuit
Conventionally, multiphase clock generating circuits have been used with a switching-element containing circuit such as the switched capacitor step-up circuit, the switched capacitor step-down circuit and others, for the purpose of supplying timing clocks to switching elements for switch-over between an ON condition and an OFF condition of each switching element. In these cases, in order to ensure that switches to be on-off controlled at different phases are never simultaneously put in the ON condition, it is necessary to use timing clock signals which are different in phase and which never overlap each other. For example, the conventional step-up voltage converting circuit disclosed in FIG. 1A of U.S. Pat. No. 4,777,577 needs a two-phase clock generator. In many cases, in addition, it becomes necessary to control the switching elements with clocks of three or more different phases, and therefore, a multiphase clock generating circuit for generating clocks of three or more different phases must be used.
The conventional multiphase clock generating circuits having the above mentioned functions have required at least one 1/2 frequency divider composed of for example a D-type flipflop, in order to generate from a single input clock a pair of clock signals that do not overlap each other in phase. Accordingly, in order to generate an N-phase clock, at least N 1/2 frequency dividers (each composed of a D-type flipflop) are required. This is disadvantageous since the number of necessary elements inevitably becomes large and therefore such a device needs a large chip area when it is implemented in an integrated circuit.
Furthermore, since the multiphase clock is generated by action of the frequency division realized by the flipflops, a clock to be supplied to a multiphase clock generating circuit has to have a sufficiently high frequency. In this connection, a possible 3-phase clock generating circuit mainly composed of flipflops would require an input clock having the frequency which is four times the frequency of each of three clocks of different phases generated by the 3-phase clock generating circuit itself. As a result, a large amount of a pass-through current flows from the voltage source to the ground, and therefore, an amount of consumed electric power is large.